1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus for performing automated control of a fab using an external parameter and an internal parameter.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today's manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed across a group of semiconductor wafers, sometimes referred to as a lot. For example, a process layer that may be composed of a variety of different materials may be formed across a semiconductor wafer. Thereafter, a patterned layer of photoresist may be formed across the process layer using known photolithography techniques. Typically, an etch process is then performed across the process layer using a patterned layer of photoresist as a mask. This etching process results in the formation of various features or objects in the process layer. Such features may be used as, for example, a gate electrode structure for transistors. Many times, trench isolation structures are also formed across the substrate of the semiconductor wafer to isolate electrical areas across a semiconductor wafer. One example of an isolation structure that can be used is a shallow trench isolation (STI) structure.
The manufacturing tools within a semiconductor manufacturing facility typically communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a specific manufacturing process.
FIG. 1 illustrates a typical semiconductor wafer 105. The semiconductor wafer 105 typically includes a plurality of individual semiconductor die 103 arranged in a grid 150. Using known photolithography processes and equipment, a patterned layer of photoresist may be formed across one or more process layers that are to be patterned. As part of the photolithography process, an exposure process is typically performed by a stepper on single or multiple die 103 locations at a time, depending on the specific photomask employed. The patterned photoresist layer can be used as a mask during etching processes, wet or dry, performed on the underlying layer or layers of material, e.g., a layer of polysilicon, metal or insulating material, to transfer the desired pattern to the underlying layer. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features or opening-type features that are to be replicated in an underlying process layer.
Turning now to FIG. 2, a flowchart depiction of a prior art process flow is illustrated. Before processing the semiconductor wafers 105, a determination is generally made as to the type of product that is to be manufactured (block 210). This leads to a step for determining the process control parameters for processing a lot of semiconductor wafers 105. Often, an operator programs various control parameters for controlling processing of semiconductor wafers 105. These control parameters may be based upon several factors. Based upon the types of product to be manufactured, the manufacturing system directs various factory components (e.g., processing tools) to process the semiconductor wafers 105 according to a pre-determined scheduling process (block 220).
Generally, the scheduling is determined based upon various factors, such as the demand for a particular product to be manufactured, conditions relating to various processing tools in the factory/fab, availability of particular processing tools in the fab, process control requirements, etc. Substantially all of the scheduling for routing particular semiconductor wafers 105 throughout various components of a fab are generally predetermined. Based upon the scheduling process, the manufacturing system processes the semiconductor wafers 105 in sequence of arrival on the factory floor (block 230). As various lots of semiconductor wafers 105 are transported to the factory floor, they are routed throughout the fab floor and are processed according to predetermined scheduling. Some modifications to the routing of the semiconductor wafers 105 may be performed based upon feedback data received during processing of the wafers (block 240). For example, using process feedback data, a problem with a particular tool may be detected and a determination may be made to stop processing and/or reroute some portions of the lot of semiconductor wafers 105.
One of the problems associated with the current methodology includes the fact that the state-of-the-art processing methods are generally designed to optimize the maximum number of semiconductor wafers 105 that could be processed by a process stream. Quite often, external factors (e.g., business factors that are not directly associated with controlling the processing operations in the fab) are used to determine process parameters in a predetermined fashion. Therefore, various changes that may occur within various components of the fab, or changes relating to external factors, may not be efficiently analyzed in order to affect changes in the processing operations. In other words, changes in the factory components or external factors may not be dealt with efficiently due to the predetermined process scheduling that is generally used to control process operations. Generally, the various lots of semiconductor wafers 105 arriving at a particular factory floor are not differentiated and are given uniform process priority (e.g., a simple first-come first-served basis). In the state-of-the-art, the process priority is generally predetermined prior to the lots being sent to the factory/fab floor. This may result in inefficiencies in reacting to changes in marketing trends, other external factors, and/or internal changes within a factory/fab.
The present invention is directed to overcoming, or at least reducing, the effects of one or more of the problems set forth above.